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2016 Oct 1Z0-489 Study Guide Questions:
Q31. You power –on PDomain0 and notice that it does not go through POST, Examine the following output:
In order for this to go through post, which property needs to be changed?
Q32. Your customer declines installation of the potential equalization cable that is recommended in the Enterprise Installation Standards (EIS) guidelines. What should you do?
A. Refuse to perform the installation until the customer adheres to the EIS guidelines,
B. Install the system regardless of the customer's decision.
C. Continue with the installation, but note the customer's decision in the sign-off document.
D. Do a review of the existing grounding steps taken, and then proceed with the installation.
Q33. You have performed the initial installation of Solaris 11 on your SPARC M5-32 system. You notice thatsome packages, like SunVTS, are not currently installed. What is the reason?
A. There was an error in the Oracle Solaris 11 installation process. You must re-install.
B. SunVTS needs to be downloaded separately from http://downloads.oracle.com.
C. After the system has been installed and rebooted, SunVTS and other packages can be added as described in the Solaris 11 EIS checklist.
D. SunVTS is no longer supported on Oracle Solaris 11.
Update 1Z0-489 exam question:
Q34. Which three options are architectural features that you find in the SPARC M5-32 processor?
A. 16x S3 cores of 3.6 Ghz
B. Shared 48 MB L3$
C. 2x memory controllers
D. 2x PCI-e Gen3 root complex
E. 16-way 256 KB L2$
Q35. You have used ILOM on other servers before, but notice that there are two targets that are new to ILOM on the SPARC M5-32 server. Which are they?
Q36. Which two statements are true according to Enterprise Installation Stan (EIS) regarding boot disk layout?
A. For ZFS-based root file systems, EIS recommends you do not use H/W RAID 1 unless sufficient disks are available for ZFS to mirror itself.
B. For ZFS-based root file systems, EIS recommends you do not use H/W RAID 0 unless sufficientdisks are available for ZFS to mirror itself.
C. Under ZFS, the boot devices/disks are placed in a ZFS poof (called rpool by default), and all datasets (consisting of file systems and volumes) are allocated flexibly from that pool.
D. For UFS-based root file systems, EIS recommends that H/W RAID 0 be used to mirror the bootdisk wherever it is available.
Realistic 1Z0-489 preparation exams:
Q37. Before you can configure the service processors, which three pieces of information do you need from the customer?
A. SP0 IP address
B. SP1 IP address
C. domain IP address
D. Active SP IP address
E. clock board IP address
Q38. Using the SP ILOM commands to list properties, which command would you use to find out the mapping for all CMU boards in physical Domain 1 to the CPUs?
A. show /Servers/Pdomains/Pdomain.l/System/Processors -level 3 location
B. show / Servers/Pdomains/Pdomain_l/DCUs -level 3 location
C. show /Servers/Pdomains/Pdomain_l/SP/Processors -level 2 location f
D. show /System/Processors/C PUs -level 2 location
Q39. Which two statements are correct regarding the power and cooling requirements of a SPARC M5-32 server?
A. The airflow is from the front to the back of the server. The approximate server airflow is: Maximum; 4200 CFM Typical: 2500 CFM
B. Only a raised floor with perforated tiles in front of the server is supported.
C. Cooling from ceiling vents is not supported.
D. If using a raised floor, you need to arrange seven perforated tiles in front of the server so thatcold air from the tiles can flow into the server. Each perforated tile should support an airflow of approximately 600 CFM.
Q40. Which three statements are true about PCIecard population on the SPARC M5-32 server?
A. Each DCU has two sets of PCIe slots. PCIe slots 1-8 are connected to IOB0, and PCIe slots 9-16 are connected to IOB1.
B. The order of PCIe card portion is the same in the OCU with 2x or 4x CMUs.
C. In a 4x CMU environment, PCIe slot 3 shares the same PCIe switch with the EMS (Base I/O board); the same is true for PCIe slots 6,11, and 14.
D. In 2x CMU environments, PICe slots 3 and 4 share the same PCIe switch with the EMS I/O board); the same is true for PICe slots 5 and 6, PCIe slots 11 and 12, and PCI slots 13 and 14.
E. In the DCU with 2x CMUs (in slots 0 and 3), you may only populated card to PCIe slots 1-8.